A principle objective in the development of computer systems has been to design a computer to produce the maximum data processing per unit of cost. In terms of design, this has led to methods and hardware for increasing the speed of execution for instructions as well as to maximizing the throughput of data for the computer system as a whole.
Early designs of computers have processed data as scalar quantities but these computers have typically been limited by the machine cycle time required for executing each of the instructions. It has been recognized that many data processing applications utilize large blocks of data in which each of the elements of data is processed in a similar fashion. As a result of this recognition, there has been developed a class of computers which utilize a technique termed vector processing. An example of such a computer is shown in U.S. Pat. No. 4,128,880 to Cray, Jr.
Even though the technique of vector processing has substantially increased the rate for data processing, there continue to be demands for faster processing and increased throughput.
The present invention provides a computer which has many of its units operating in a pipelined fashion together with concurrent processing as well as other unique operating techniques to speed up instruction execution and enhance the overall data throughput rate.